Interrupter failure alarm circuit



' Oct. I K.- R. SCHARTMANN ETALIY E INTERRUPTER FAILURE ALARM CIRCUIT Filed May 23, 1968 l I I 4 "V I I r v .j i R2 R4 Y v v ALM-2 I INVENTORS K.R'. SCHARTMANN 3.1-1. OLDHAM AGENTS INTERRUPTED GROUND PULSES United States Patent 3,537,090 INTERRUPTER FAILURE ALARM CIRCUIT Knut R. Schartmann, Montreal, Quebec, and Richard H.

Oldham, Verdum, Quebec, Canada, assignors to Northern Electric Company Limited, Montreal, Quebec, Canada Filed May 23, 1968, Ser. No. 731,514

Int. Cl. G08b 21/00 340-248 4 Claims ABSTRACT OF THE DISCLOSURE The preferred embodiment of the invention relates to an interrupter failure alarm circuit using a unijunction transistor in series with an alarm relay for operating an alarm device. The unijunction transistor is triggered by a pair of capacitors adapted to be alternately connected to the emitter electrode of the unijunction transistor depending on Whether the interrupter is in its operated or released state. Under normal operation of the interrupter, the capacitors are successively charged and discharged and the potential applied to the emitter electrode never rises high enough to trigger the unijunction transistor. However if the interrupter fails, the capacitor which is connected to the emitter electrode is charged sufiiciently to trigger the transistor into conduction thereby operating the alarm relay which in turn operates the alarm device. The alarm relay includes a pair of contacts connected across the emitter and base two electrodes of the unijunction transistor to lock the unijunction transistor into conduction. However if normal operation of the interrupter is resumed after a temporary failure, a discharged capac itor is connected to the emitter electrode of the unijunction transistor and the unijunction transistor is turned off to restore the alarm relay.

This invention relates to an automatic reset for use with interrupter failure alarm circuits employing a unijunction transistor timing circuit and more particularly to a means for providing alarm lock-up ifthe failure is permanent and automatic release if the failure is temporary.

interrupter circuits are pulsing circuits which are widely used in the telephone art and are usually equipped with alarm circuits to indicate when continuous pulsing has stopped. An interrupter failure alarm circuit using a unijunction transistor circuit has been disclosed in Canadian Pat. 790,125 issued on July 16, 1968 in the name of Z. A. Kular. The alarm circuit disclosed in the application does not, however, provide automatic reset if the failure is only temporary and must be reset manually.

It is therefore the main feature of the invention to provide an alarm circuit using a unijunction transistor circuit which automatically resets itself when the trouble condition is momentary and the normal pulsing of the interrupter is restored.

The interrupter failure alarm circuit in accordance with the invention comprises an alarm relay operated by a unijunction transistor which is triggered by a capacitor adapted to 'be connected to the emitter electrode of the unijunction transistor. Under normal operation of the interrupter the capacitor is alternately charged and discharged and the potential applied to the emitter electrode never rises high enough to trigger the unijunction transistor. However, if the interrupter fails, the capacitor is charged sufficiently to trigger the transistor into conduction thereby operating the alarm relay which in turn operates an alarm device such as a bell or a lamp. The interrupter failure alarm circuit includes means responsive to the operation of the alarm relay to lock the unijunction tran- 3,537,090 Patented Oct. 27, 1970 sistor into conduction and means responsive to a temporary failure of the interrupter for automatically restoring the alarm relay by turning off the unijunction transistor.

The invention will now be disclosed with reference to a drawing illustrating a preferred embodiment of the invention with no intention however to limit the scope of the invention to the embodiment disclosed.

In the drawing, relay P is a pulsing relay which is continuously operated and released by ground pulses provided by an interrupter (not shown). The alarm circuit disclosed is for the purpose of detecting a failure of the interrupter which would cause the stoppage of the continuous pulsing of relay P. Relay P has normally closed contacts P-1 and P2 and normally open contacts P-3 and P-4.

The alarm circuit comprises a unijunction transistor Q1 having an emitter electrode 13, a base-one electrode B1, and a base-two electrode B2. Connected to the B1 electrode of transistor Q1 is an alarm relay ALM having a pair of normally open contacts ALM-1 in the circuit of an alarm device '10 and a pair of normally open contacts ALM-2 across the emitter electrode E and the base-two electrode B2. Capacitors C1 and C2 are connected in series with resistors R1 and R2 respectively across potential source B. When relay P is in a nonoperated state, contacts P-1 and P-2 are closed and capacitor C2 is charged, while capacitor C1 is discharged across resistor R3. Similarly when relay P is in an operated state, contacts P-3 and P=4 are closed and capacitor C1 is charged, while capacitor C2 is discharged across resistor R3. Capacitors C1 and C2 are alternately connected to the emitter E of unijunction transistor Q1 through contacts P-1 and P-3 depending on the state of relay P which state is, as mentioned previously, determined by the state of the interrupter.

When relay P is continuously pulsing, capacitors C1 and C2 are repeatedly being charged and discharged and the voltage on the emitter E of unijunction transistor Q1 never rises high enough to trigger the transistor. In the case of failure of the interrupter, either the operate or release period of pulsing relay P, depending on the state of the interrupter at the time of failure, becomes long enough to allow capacitor C1 or C2 to attain a potential equal to the peak point voltage of the unijunction transistor Q1. Consequently transistor Q1 will conduct and operate alarm relay ALM. The operation of relay ALM closes contacts ALM-1 to operate alarm device 10 which may be a bell or a light to indicate that the pulsing of relay P has stopped.

The operation of relay ALM also closes contacts ALM2 which provides an additional emitter current path through resistor R4. The value of resistor R4 is calculated to maintain conduction through the unijunction transistor Q1 and also hold relay ALM operated. The transistor Q1 does not return to a non-conduction state as it would normally do if contacts ALM-2 were not present and relay ALM is consequently looked 0perated through its own contacts ALM-2 and the emitter base-one junction of transistor Q1.

If the operation of pulsing relay P is resumed after a temporary failure, the capacitor C1 or C2 which has been discharged through resistor R3 during the failure period is connected to the emitter of transistor Q1 through contacts P-3 or P-l. This will drop the emitter potential below the valley point of the unijunction transistor and cause the transistor to turn off. Relay ALM will release emitter base-one saturation voltage as specified on the Texas Instrument data sheet of the 2Nl67lB unijunction transistor for example is 5 volts at an emitter current of 50 ma. this voltage decreases as the emitter current decreases until the valley point emitter current .(min. 8 ma. max. approximately 15 ma. at 25 C.) is reached. Assuming that the minimum release current of relay ALM is about 18 ma., the minimum emitter current required to maintain transistor Q1 conductive and relay ALM operated will be 18 ma.

To provide a sufiicient safety margin the emitter current may be set at 40 ma. At such a current value, the drop across relay ALM would be 4 volts using a 100 ohm relay. In addition the emitter base-one voltage would be approximately 5 volts. If the supply voltage E is 25 volts, the value of resistor R4 will be approximately 400 ohms.

It should also be understood that the above disclosed automatic alarm release circuit can be used to initiate an automatic transfer to a second interrupter where a second interrupter is used to take over a first one should it fail. Such a system is disclosed in the above identified Kular patent. Once transfer is completed, the alarm circuit will automatically reset itself and monitor the second interrupter.

It should further be understood that although the above disclosed embodiment of the invention is for the purpose of monitoring both the operate and release state of the interrupter, it could be modified to monitor only one state that is only the operate or the release state of the interrupter. In such case the circuit for triggering the unijunction transistor could be simplified by removing resistors R2, capacitor C2, and contacts P-1 and P-4 if it was only necessary to monitor the operate state of the interrupter for example. The alarm release feature after a temporary failure would work the same except that the unijunction transistorwould be restored only when the capacitor C1 is reconnected to the emitter of the unijunction transistor after having been discharged through the resistor R3.

Whatis claimed is:

1. An interrupter failure alarm circuit comprising:

(a) a unijunction transistor having a base-one, a basetwo and an emitter electrode;

(b) an alarm relay connected in series with the baseone base-two circuit of the unijunction transistor;

(c) capacitor means adapted to be connected to the emitter electrode of the unijunction transistor for triggering the unijunction transistor into conduction a pre-determined time interval after being connected to the emitter electrode of the unijunction transistor;

((1) means responsive to normal operation of said interrupter for alternately charging and discharging said capacitor means whereby the charge of said capacitor means never rises high enough to trigger the unijunction transistor;

(e) means responsive to failure of the interupter to fully charge said capacitor means to trigger the unijunction transistor into conduction and operate the alarm relay;

(f) means responsive to the operation of the alarm relay to lock the unijunction transistor into conduction; and

(g) means responsive to the restoration of the interrupter after a temporary failure condition for turning off the transistor thereby releasing the alarm relay;

(h) a pulsing relay adapted to be repeatedly operated and released by the interrupter and wherein,

(i) said capacitor means comprises two capacitors which are alternately connected to the emitter electrode of the unijunction transistor depnding on the state of the pulsing relay.

2. An interrupter failure alarm circuit as defined in claim 1 further including a resistor for discharging each one of said capacitors when they are momentarily disconnected from the emitter electrode of the unijucntion transistor.

3. An interrupter failure alarm circuit as defined in claim 2 wherein said means for locking the unijunction transistor into conduction includes contacts of said alarm relay which are connected between the emitter electrode and the base-two electrode of the unijunction transistor thereby providing enough current through the unijunction transistor to maintain conduction therethrough and to hold the alarm relay operated.

4. An interrupter failure alarm circuit as defined in claim 2 wherein the restoration of the interrupter after a temporary failure causes said discharged capacitor to be connected to the emitter electrode of the unijunction transistor to drop the emitter potential betlow the valley point of the unijunction transistor thereby causing the transistor to turn off.

References Cited UNITED STATES PATENTS 3,284,788 11/19 66 Hudson -340- 239 3,396,386 8/1968 Garfunkel et al. 340--213XR ALVIN H. WARING, Primary Examiner D. MYER, Assistant Examiner U.S. Cl. X.R. 

